Academics
| Interests | Education | Experience | Skills | Coursework |
| Publications | Honors | References | Links | Download Resume |
High Performance Digital VLSI design.
Objective is to obtain an outstanding position in the area of VLSI.
| Dates | Institute | Location | Major | Degree |
|
| 09/1999
-now |
University
of Washington |
Seattle,
WA, USA |
EE
(VLSI Design & CAD) |
Pursuing PhD |
|
| 09/1996
-07/1999 |
Peking
University |
Beijing,
P.R.China |
Microelectronics | M.S. |
|
| 09/1991
-07/1996 |
Peking
University |
Beijing,
P.R.China |
Microelectronics | B.S. |
3.4 3.7(Major) |
Skills
- From 09/99: Research Assistant in the Department of Electrical Engineering,
VLSI Design Lab, University of Washington, Seattle
Current research: high speed adder design, OPL (Output Prediction Logic)
- 06/01-08/01: 12-week internship with IBM Austin Research Lab (ARL).
8-Ghz Superpipelining FPU Circuits - multiply-add-fused unit (MAF),
implemented in Output Prediction Logic, simulated in IBM SOI technology, about 0.13 mm
- 09/98-05/99: Research Assistant in the Institute of Microelectronics, Peking University, P.R.China
CMOS/SOI Device Modeling & Simulation, esp dealing with BSIM3SOI & SPICE3f4.
- 09/97-07/98: Research Assistant in the Institute of Microelectronics, Peking University, P.R.China
CMOS/SOI gate array ASIC layout design and verification.
- 09/94-10/98: undergraduate project
Solid State Physics CAI Software and 3D graph
Related Coursework
- CAD Tools: Cadence, Hspice, Verilog HDL, Synopsys, COMPASS, IBM Powerspice
- Programming: C, perl, lex & yacc
- Platforms: DOS, WINDOWS & UNIX
RECENT COURSEWORK & SELECTED PROJECTS at UW
- EE476, Digital Integrated Circuit Design, project: 3-digit serial lock (state machine) using Verilog, Synopsys, Cadence (Standard Cells, auto layout, LVS, DRC) and Hspice simulation
- EE477, Custom Digital CMOS Circuit Design, projects include: 128word X 4bit memory, 24-bit CLA domino adder, 24-bit carry select adder, 12X12 Booth-2 Multiplier
- EE541, Automated Layout of Integrated Circuits, projects include: partitioning, placement, routing
- EE535, Design of Digital Integrated Circuits and Systems, project: Ultra High Speed OPL adder
- EE538C, Synthesis of Digital Circuits, project: technology mapping
- EE540, VLSI Testing, projects: Sorter Design & Testing, Boundary Scan Standard 1149.1, 74181 ALU chip Testing & DFT
- EE586, Digital Video Coding: digital video and compression fundamentals, motion compensated predictive coding, image & video coding standards (JPEG, H.261, H.263, H.263+, MPEG-1, MPEG-2, MPEG-4), rate controls, compression video over networks
- EE400D, Analog Design For Mixed Signal Integrated Circuits, projects: a two-stage single-ended CMOS opamp,
a folded-cascode single-ended CMOS opamp
PREVIOUS COURSE BACKGROUND at PKUPublicationsComputer:
FORTRAN Programming, Digital Logic, Assemble Language, Computer Organization, Computer Architecture,Circuits:
Microprocessor Lab, Operating System, Unix OS & C, Digital Signal ProcessingElectronic Circuits, Analysis & Design of Bipolar IC, Analysis & Design of MOS IC, CAD of Integrated Circuits,Semiconductor Physics, Physics of Semiconductor Devices
Principle of Integrated Circuits Technology , VLSI Analysis and Design, ASIC Design Methodology,
CMOS Analog Circuit Analysis and Design, Computational Microelectronics
Honors
- S. Sun, L. McMurchie and C. Sechen, “A High-Performance 64-bit Adder Implemented in Output Predicted Logic”, 19th Conf. on Advanced Research in VLSI (ARVLSI), March 14-16, 2001, Salt Lake City, Utah.
- S. Sun and D. Wang, “Solid State Physics CAI Software”, the Higher Education Publishing (China), 1998
- Siemens Scholarship, Peking University, 1997-1998
- Nominee for Chenming Hu (U.C.Berkeley Professor) Graduate Scholarship, Peking University, 1996-1997
- Outstanding Study Award, Peking University, 1994-1995
Available upon request.
Links
Download ResumeIEEE Home Page, Currently a student member
IEEE Xplore, IEL full text IEEE database has this new address, 1989-now
- Design
- International Solid-State Circuits Conference (February)
- Custom Integrated Circuits Conference (May)
- International Conference on Computer Design (September)
- Symposia on VLSI Technology and Circuits (June, always at Honolulu or Japan)
- CAD/Design Automation
- International Conference on Computer-Aided Design
- Annual IEEE International ASIC/SOC Conference
- Design Automation Conference
- Design, Automation & Test in Europe (DATE)
- 11th Great Lakes Symposium on VLSI - GLSVLSI2001
- SIGDA (Special Interest Group on Design Automation)
The Conference on Advanced Research in VLSI (ARVLSI), where my first paper accepted for March 2001
Center for Design of Analog-Digital Integrated Circuits (CDADIC)
IBM technical paper search (1988-)
IBM Journal of Research and DevelopmentHewlett Packard's microprocessor labs
Stanford VLSI Research Group
Stanford Computer Architecture and Arithmetic Group
Download Word file